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Wednesday, September 28, 2016

DATA COMMUNICATION INTERFACE



DATA COMMUNICATION INTERFACE

For two devices linked by a transmission medium to exchange data, a higf
degree of cooperation is required. Typically, data are transmitted one bit at a timc
over the medium. The timing (rate, duration, spacing) of these bits must be thc
same for transmitter and receiver. Two common techniques for controlling this tim
ing-asynchronous and synchronous-are explored in Section 5.1. Next, we look at
the physical interface between data transmitting devices and the transmission line
Typically, digital data devices do not attach to and signal across the mediulr
directly. Instead, this process is mediated through a standardized interface that pro.
vides considerable control over the interaction between the transmitting/receiving
devices and the transmission line.
ASYNCHRONOUS AND SYNCHRONOUS TRANSMISSION
In this lesson, we are concerned with serial transmission of data; that is, data rate
transferred over a single signal path rather than a parallel set of lines, as is common
with 110 devices and internal computer signal paths. With serial transmission
signaling elements are sent down the line one at a time. Each signaling elemenl
may be
0 Less than one bit. This is the case, for example, with Manchester coding.
6 One bit. NRZ-L and FSK are digital and analog examples, respectively.
6 More than one bit. QPSK is an example.
For simplicity in the following discussion, we assume one bit per signaling ele.
ment unless otherwise stated. The discussion is not materially affected by this sim
plification.
Recall from Figure 2.15 that the reception of digital data involves sampling the
incoming signal once per bit time to determine the binary value. One of the diffi
culties encountered in such a process is that various transmission impairments will
corrupt the signal so that occasional errors will occur. This problem is compounded
by a timing difficulty: In order for the receiver to sample the incoming bits properly,
it must know the arrival time and duration of each bit that it receives.
Suppose that the sender simply transmits a stream of data bits. The sender has
a clock that governs the timing of the transmitted bits. For example, if data are tc
be transmitted at one million bits per second (1 Mbps), then one bit will be trans.
mitted every 1 microsecond (ms), as measured by the sender's clock. Typi
cally, the receiver will attempt to sample the medium at the center of each bit-time.
The receiver will time its samples at intervals of one bit-time. In our example, the
sampling would occur once every 1 ms. If the receiver times its samples based on its
own clock, then there will be a problem if the transmitter's and receiver's clocks are
not precisely aligned. If there is a drift of 1 percent (the receiver's clock is 1 percent
faster or slower than the transmitter's clock), then the first sampling will be 0.01 of
a bit-time (0.01 ps) away from the center of the bit (center of bit is .5 ps from beginning
and end of bit). After 50 or more samples, the receiver may be in error because
it is sampling in the wrong bit-time (50 X .01 = .5 ps). For smaller timing differences,
the error would occur later, but, eventually, the receiver will be out of step
with the transmitter if the transmitter sends a sufficiently long stream of bits and if
no steps are taken to synchronize the transmitter and receiver.
Asynchronous Transmission
Two approaches are common for achieving the desired synchronization. The first is
called, oddly enough, asynchronous transmission. The strategy with this scheme is
to avoid the timing problem by not sending long, uninterrupted streams of bits.
Instead, data are transmitted one character at a time, where each character is five
to eight bits in length.' Timing or synchronization must only be maintained within
each character; the receiver has the opportunity to resynchronize at the beginning
of each new character.
The technique is easily explained with reference to Figure 5.1. When no character
is being transmitted, the line between transmitter and receiver is in an idle
state. The definition of idle is equivalent to the signaling element for binary 1. Thus,
for NRZ-L signaling (see Figure 4.2), which is common for asynchronous transmission,
idle would be the presence of a negative voltage on the line. The beginning of
a character is signaled by a start-bit with a value of binary 0. This is followed by the
five to eight bits that actually make up the character. The bits of the character are
transmitted beginning with the least significant bit. For example, for ASCII characters,
the first bit transmitted is the bit labeled bl in Table 2.1. Usually, this is followed
by a parity bit, which therefore is in the most significant bit position. The parity
bit is set by the transmitter such that the total number of ones in the character,
including the parity bit, is even (even parity) or odd (odd parity), depending on the
convention being used. This bit is used by the receiver for error detection
. The final element is a stop, which is a binary 1. A minimum
length for the stop is specified, and this is usually 1, 1.5, or 2 times the duration of
an ordinary bit. No maximum value is specified. Because the stop is the same as the
idle state, the transmitter will continue to transmit the stop signal until it is ready to
send the next character.
If a steady stream of characters is sent, the interval between two characters is
uniform and equal to the stop element. For example, if the stop is one bit-time and
the ASCII characters ABC are sent (with even parity bit), the pattern is
01000001010010000101011000011111 . . . 111.^2T he start bit (0) starts the timing
sequence for the next nine elements, which are the &bit ASCII code and the stop
bit. In the idle state, the receiver looks for a transition from 1 to 0 to signal the
beginning of the next character and then samples the input signal at one-bit intervals
for seven intervals. It then looks for the next 1-to-0 transition, which will occur
no sooner than one more bit-time.
The timing requirements for this scheme are modest. For example, ASCII
characters are typically sent as &bit units, including the parity bit. If the receiver is
5 percent slower or faster than the transmitter, the sampling of the eighth information
bit will be displaced by 45 percent and still be correctly sampled. Figure 5.lc
shows the effects of a timing error of sufficient magnitude to cause an error in
reception. In this example we assume a data rate of 10,000 bits per second (10 kbps);
therefore, each bit is of 0.1 millisecond (ms), or 100 ms, duration. Assume that the
receiver is off by 7 percent, or 7 ms per bit-time. Thus, the receiver samples the
incoming character every 93 ms (based on the transmitter's clock). As can be seen,
the last sample is erroneous.
An error such as this actually results in two errors. First, the last sampled bit
is incorrectly received. Second, the bit count may now be out of alignment. If bit 7
is a 1 and bit 8 is a 0, bit 8 could be mistaken for a start bit. This condition is termed
a framing error, as the character plus start and stop bits are sometimes referred to
as a frame. A framing error can also occur if some noise condition causes the false
appearance of a start bit during the idle state.
Asynchronous transmission is simple and cheap but requires an overhead of
two to three bits per character. For example, for an 8-bit code, using a 1-bit-long
stop bit, two out of every ten bits convey no information but are there merely for
synchronization; thus the overhead is 20%. Of course, the percentage overhead
could be reduced by sending larger blocks of bits between the start and stop bits.
However, as Figure 5.lc indicates, the larger the block of bits, the greater the cumulative
timing error. To achieve greater efficiency, a different form of synchronization,
known as synchronous transmission, is used.
Synchronous Transmission
With synchronous transmission, a block of bits is transmitted in a steady stream
without start and stop codes. The block may be many bits in length. To prevent timing
drift between transmitter and receiver, their clocks must somehow be synchronized.
One possibility is to provide a separate clock line between transmitter and
receiver. One side (transmitter or receiver) pulses the line regularly with one short
pulse per bit-time. The other side uses these regular pulses as a clock. This technique
works well over short distances, but over longer distances the clock pulses are
subject to the same impairments as the data signal, and timing errors can occur. The
other alternative is to embed the clocking information in the data signal; for digital
signals, this can be accomplished with Manchester or Differential Manchester
encoding. For analog signals, a number of techniques can be used; for example, the
carrier frequency itself can be used to synchronize the receiver based on the phase
of the carrier.
With synchronous transmission, there is another level of synchronization
required, so as to allow the receiver to determine the beginning and end of a block
of data; to achieve this, each block begins with apreamble bit pattern and generally
ends with a postamble bit pattern. In addition, other bits are added to the block that
convey control information used in the data link control procedures discussed in
Lesson 6. The data plus preamble, postamble, and control information are called
a frame. The exact format of the frame depends on which data link control procedure
is being used.
Figure 5.2 shows, in general terms. a typical frame format for synchronous
transmission. Typically, the frame starts with a preamble called a flag, which is eight
bit-long. The same flag is used as a postamble. The receiver looks for the occurrence
of the flag pattern to signal the start of a frame. This is followed by some number of
control fields, then a data field (variable length for most protocols), more control
fields, and finally the flag is repeated.
FIGURE 5.2
For sizable blocks of data, synchronous transmission is far more efficient than
asynchronous. Asynchronous transmission requires 20 percent or more overhead.
The control information, preamble, and postamble in synchronous transmission are
typically less than 100 bits. For example, one of the more common schemes, HDLC,
contains 48 bits of control, preamble, and postamble. Thus, for a 1000-character
block of data, each frame consists of 48 bits of overhead and 1000 X 8 = 8,000 bits
of data, for a percentage overhead of only 4818048 X 100% = 0.6%.

LINE CONFIGURATION
Two characteristics that distinguish various data link configurations are topology
and whether the link is half duplex or full duplex.

Topology
The topology of a data link refers to the physical arrangement of stations on a transmission
medium. If there are only two stations, (e.g., a terminal and a computer or
two computers), the link is point-to-point. If there are more than two stations, then
it is a multipoint topology. Traditionally, a multipoint link has been used in the case
of a computer (primary station) and a set of terminals (secondary stations). In
today's environments, the multipoint topology is found in local area networks.
Traditional multipoint topologies are made possible when the terminals are
only transmitting a fraction of the time. Figure 5.3 illustrates the advantages of the
multipoint configuration. If each terminal has a point-to-point link to its computer,
then the computer must have one I10 port for each terminal. Also, there is a sepa-
rate transmission line from the computer to each terminal. In a multipoint configuration,
the computer needs only a single 110 port, thereby saving hardware costs.
Only a single transmission line is needed, which also saves costs.

Full Duplex and Half Duplex
Data exchanges over a transmission line can be classified as full duplex or half
duplex. With half-duplex transmission, only one of two stations on a point-to-point
link may transmit at a time. This mode is also referred to as two-way alternate,
suggestive of the fact that two stations must alternate in transmitting; this can be
compared to a one-lane, two-way bridge. This form of transmission is often used for
terminal-to-computer interaction. While a user is entering and transmitting data,
the computer is prevented from sending data, which would appear on the terminal
screen and cause confusion.
For full-duplex transmission, two stations can simultaneously send and receive
data from each other. Thus, this mode is known as two-way simultaneous and may
be compared to a two-lane, two-way bridge. For computer-to-computer data
exchange, this form of transmission is more efficient than half-duplex transmission.
With digital signaling, which requires guided transmission, full-duplex operation
usually requires two separate transmission paths (e.g., two twisted pairs), while
half duplex requires only one. For analog signaling, it depends on frequency; if a
station transmits and receives on the same frequency, it must operate in half-duplex
mode for wireless transmission, although it may operate in full-duplex mode for
guided transmission using two separate transmission lines. If a station transmits on
one frequency and receives on another, it may operate in full-duplex mode for wireless
transmission and in full-duplex mode with a single line for guided transmission.

Interfacing
Most digital data-processing devices have limited data-transmission capability. Typically,
they generate a simple digital signal, such as NRZ-L, and the distance across
which they can transmit data is limited. Consequently, it is rare for such a device
(terminal, computer) to attach directly to a transmission or networking facility. The
more common situation is depicted in Figure 5.4. The devices we are discussing,
which include terminals and computers, are generically referred to as data terminal
equipment (DTE). A DTE makes use of the transmission system through the mediation
of data circuit-terminating equipment (DCE). An example of the latter is a
modem.
On one side, the DCE is responsible for transmitting and receiving bits, one
at a time, over a transmission medium or network. On the other side, the DCE must
interact with the DTE. In general, this requires both data and control information
to be exchanged. This is done over a set of wires referred to as interchange circuits.
For this scheme to work, a high degree of cooperation is required. The two DCEs
that exchange signals over the transmission line or network must understand each
other. That is, the receiver of each must use the same encoding scheme (e.g., Manchester,
PSK) and data rate as the transmitter of the other. In addition, each DTEDCE
pair must be designed to interact cooperatively. To ease the burden on dataprocessing
equipment manufacturers and users, standards have been developed
that specify the exact nature of the interface between the DTE and the DCE. Such
an interface has four important characteristics:
Mechanical
Electrical
Functional
Procedural
The mechanical characteristics pertain to the actual physical connection of the
DTE to the DCE. Typically, the signal and control interchange circuits are bundled
into a cable with a terminator plug, male or female, at each end. The DTE and DCE
must present plugs of opposite genders at one end of the cable, effecting the physical
connection; this is analogous to the way residential electrical power is produced.
Power is provided via a socket or wall outlet, and the device to be attached must
have the appropriate male plug (two-pronged, two-pronged polarized, or threepronged)
to match the socket.
The electrical characteristics have to do with the voltage levels and timing of
voltage changes. Both DTE and DCE must use the same code (e.g., NRZ-L), must
use the same voltage levels to mean the same things, and must use the same dura
tion of signal elements. These characteristics determine the data rates and distances
that can be achieved.
Functional characteristics specify the functions that are performed by assigning
meanings to each of the interchange circuits. Functions can be classified into the
broad categories of data, control, timing, and electrical ground.
Procedural characteristics specify the sequence of events for transmitting data,
based on the functional characteristics of the interface. The examples that follow
should clarify this point.
A variety of standards for interfacing exists; this section presents two of the
most important: V.241EIA-232-E, and the ISDN Physical Interface.

V.24/EIA-232-E
The most widely used interface is one that is specified in the ITU-T standard, V.24.
In fact, this standard specifies only the functional and procedural aspects of the
interface; V.24 references other standards for the electrical and mechanical aspects.
In the United States, there is a corresponding specification, virtually identical, that
covers all four aspects: EIA-232. The correspondence is as follows:
Mechanical: IS0 2110
Electrical: V.28
c Functional: V.24
Procedural: V.24
EIA-232 was first issued by the Electronic Industries Association in 1962, as
RS-232. It is currently in its fifth revision EIA-232-E, issued in 1991. The current
V.24 and V.28 specifications were issued in 1993. This interface is used to connect
DTE devices to voice-grade modems for use on public analog telecommunications
systems. It is also widely used for many other interconnection applications.
Mechanical Specification
The mechanical specification for EIA-232-E is illustrated in Figure 5.5. It calls for a
25-pin connector, defined in IS0 2110, with a specific arrangement of leads. This
connector is the terminating plug or socket on a cable running from a DTE (e.g.,
terminal) or DCE (e.g., modem). Thus, in theory, a 25-wire cable could be used to
connect the DTE to the DCE. In practice, far fewer interchange circuits are used in
most applications.
Electrical Specification
The electrical specification defines the signaling between DTE and DCE. Digital
signaling is used on all interchange circuits. Depending on the function of the interchange
circuit, the electrical values are interpreted either as binary or as control signals.
The convention specifies that, with respect to a common ground, a voltage
more negative than -3 volts is interpreted as binary 1 and a voltage more positive
than f 3 volts is interpreted as binary 0; this is the NRZ-L code illustrated in Figure
4.2. The interface is rated at a signal rate of <20 kbps and a distance of <15 meters.
Greater distances and data rates are possible with good design, but it is prudent to
assume that these limits apply in practice as well as in theory.
The same voltage levels apply to control signals; a voltage more negative than
-3 volts is interpreted as an OFF condition and a voltage more positive than +3
volts is interpreted as an ON condition.
Functional Specification
'Table 5.1 summarizes the functional specification of the interchange circuits, and
Figure 5.5 illustrates the placement of these circuits on the plug. The circuits can be
grouped into the categories of data, control, timing, and ground. There is one data
circuit in each direction, so full-duplex operation is possible. In addition, there are
two secondary data circuits that are useful when the device operates in a half-duplex
fashion. In the case of half-duplex operation, data exchange between two DTEs (via
their DCEs and the intervening communications link) is only conducted in one
direction at a time. However, there may be a need to send a halt or flow-control
message to a transmitting device; to accommodate this, the communication link is
equipped with a reverse channel, usually at a much lower data rate than the primary
channel. At the DTE-DCE interface, the reverse channel is carried on a separate
pair of data circuits.
There are fifteen control circuits. The first ten of these listed in Table 5.1
relate to the transmission of data over the primary channel. For asynchronous transmission,
six of these circuits are used (105, 106, 107, 108.2, 125, 109). The use of
these circuits is explained in the subsection on procedural specifications. In addition
to these six circuits, three other control circuits are used in synchronous transmis-
sion. The Signal Quality Detector circuit is turned ON by the DCE to indicate that
the quality of the incoming signal over the telephone line has deteriorated beyond
some defined threshold. Most high-speed modems support more than one transmission
rate so that they can fall back to a lower speed if the telephone line becomes
noisy. The Data Signal Rate Selector circuits are used to change speeds; either the
DTE or DCE may initiate the change. The next three control circuits (120,121,122)
are used to control the use of the secondary channel, which may be used as a reverse
channel or for some other auxiliary purpose.
The last group of control signals relate to loopback testing. These circuits
allow the DTE to cause the DCE to perform a loopback test. These circuits are only
valid if the modem or other DCE supports loopback control; this is now a common
modem feature. In the local loopback function, the transmitter output of the
modem is connected to the receiver input, disconnecting the modem from the transmission
line. A stream of data generated by the user device is sent to the modem
and looped back to the user device. For remote loopback, the local modem is connected
to the transmission facility in the usual fashion, and the receiver output of
the remote modem is connected to the modem's transmitter input. During either
form of test, the DCE turns ON the Test Mode circuit. Table 5.2 shows the settings
for all of the circuits related to loopback testing, and Figure 5.6 illustrates the use.
Loopback control is a useful fault-isolation tool. For example, suppose that a
user at a personal computer is communicating with a server by means of a modem
connection and communication suddenly ceases. The problem could be with the
local modem, the communications facility, the remote modem, or the remote server.
A network manager can use loopback tests to isolate the fault. Local loopback
checks the functioning of the local interface and the local DCE. Remote loopback
tests the operation of the transmission channel and the remote DCE.
The timing signals provide clock pulses for synchronous transmission. When
the DCE is sending synchronous data over the Received Data circuit (104), it also
sends 1-0 and 0-1 transitions on Receiver Element Signal Timing (115), with transitions
timed to the middle of each BB signal element. When the DTE is sending synchronous
data, either the DTE or DCE can provide timing pulses, depending on the
circumstances.
Finally, the signal ground/common return (102) serves as the return circuit
for all data leads. Hence, transmission is unbalanced, with only one active wire.
Balanced and unbalanced transmission are discussed in the section on the ISDN
interface.
Procedural Specification
The procedural specification defines the sequence in which the various circuits are
used for a particular application. We give a few examples.
The first example is a very common one for connecting two devices over a
short distance within a building. It is known as an asynchronous private line modem,
or a limited-distance modem. As the name suggests, the limited-distance modem
accepts digital signals from a DTE, such as a terminal or computer, converts these
to analog signals, and then transmits these over a short length of medium, such as
twisted pair. On the other end of the line is another limited-distance modem, which
accepts the incoming analog signals, converts them to digital, and passes them on to
another terminal or computer. Of course, the exchange of data is two-way. For this
simple application, only the following interchange circuits are actually required:
Signal ground (102)
Transmitted data (103)
Received data (104)
Request to send (105)
Clear to send (106)
DCE ready (107)
Received-Line Signal Detector (109)
When the modem (DCE) is turned on and is ready to operate, it asserts
(applies a constant negative voltage to) the DCE Ready line. When the DTE is
ready to send data (e.g., the terminal user has entered a character), it asserts
Request to Send. The modem responds, when ready, by asserting Clear to Send,
indicating that data may be transmitted over the Transmitted Data line. If the
arrangement is half-duplex, then Request to Send also inhibits the receive mode.
The DTE may now transmit data over the Transmitted Data line. When data arrive
from the remote modem, the local modem asserts Received-Line Signal Detector to
indicate that the remote modem is transmitting and delivers the data on the
Received Data line. Note that it is not necessary to use timing circuits, as this is
asynchronous transmission.
The circuits just listed are sufficient for private line point-to-point modems,
but additional circuits are required to use a modem to transmit data over the telephone
network. In this case, the initiator of a connection must call the destination
device over the network. Two additional leads are required:
Q DTE ready (108.2)
@ Ring indicator (125)
With the addition of these two lines, the DTE-modem system can effectively
use the telephone network in a way analogous to voice telephone usage. Figure 5.7
depicts the steps involved in dial-up half-duplex operation. When a call is made,
either manually or automatically, the telephone system sends a ringing signal. A
telephone set would respond by ringing its bell; a modem responds by asserting
Ring Indicator. A person answers a call by lifting the handset; a DTE answers by
asserting Data Terminal Ready. A person who answers a call will listen for
another's voice, and, if nothing is heard, hang up. A DTE will listen for Carrier
Detect, which will be asserted by the modem when a signal is present; if this circuit
is not asserted, the DTE will drop Data Terminal Ready. You might wonder how
this last contingency might arise; one common way is if a person accidentally dials
the number of a modem. This activates the modem's DTE, but when no carrier tone
comes through, the problem is resolved.
It is instructive to consider situations in which the distances between devices
are so close as to allow two DTEs to directly signal each other. In this case, the
V.24lEIA-232 interchange circuits can still be used, but no DCE equipment is provided.
For this scheme to work, a null modem is needed, which interconnects leads
in such a way as to fool both DTEs into thinking that they are connected to
modems. Figure 5.8 is an example of a null modem configuration; the reasons for
the particular connections should be apparent to the reader who has grasped the
preceding discussion.
LSDN Physical Interface
The wide variety of functions available with V.24lEIA-232 is provided by the use of
a large number of interchange circuits. This is a rather expensive way to achieve
results. An alternative would be to provide fewer circuits but to add more logic at
the DTE and DCE interfaces. With the dropping costs of logic circuitry, this is an
attractive approach. This approach was taken in the X.21 standard for interfacing to
public circuit-switched networks, specifying a 15-pin connector. More recently, the
trend has been carried further with the specification of an 8-pin physical connector
to an Integrated Services Digital Network (ISDN). ISDN, which is an all-digital
replacement for existing public telephone and analog telecommunications networks,
is discussed further in Lesson A. In this section, we look at the physical
interface defined for ISDN.
Physical Connection
In ISDN terminology, a physical connection is made between terminal equipment
(TE) and network-terminating equipment (NT). For purposes of our discussion,
these terms correspond, rather closely, to DTE and DCE, respectively. The physical
connection, defined in IS0 8877, specifies that the NT and TE cables shall terminate
in matching plugs that provide for 8 contacts.
Figure 5.9 illustrates the contact assignments for each of the 8 lines on both
the NT and TE sides. Two pins are used to provide data transmission in each direction.
These contact points are used to connect twisted-pair leads coming from the
NT and TE devices. Because there are no specific functional circuits, the transmit1
receive circuits are used to carry both data and control signals. The control information
is transmitted in the form of messages.
The specification provides for the capability to transfer power across the interface.
The direction of power transfer depends on the application. In a typical application,
it may be desirable to provide for power transfer from the network side
toward the terminal in order, for example, to maintain a basic telephony service in
the event of failure of the locally provided power. This power transfer can be
accomplished using the same leads used for digital signal transmission (c, d, e, f), or
on additional wires, using access leads g-h. The remaining two leads are not used in
the ISDN configuration but may be useful in other configurations.
Electrical Specification
The ISDN electrical specification dictates the use of balanced transmission. With
balanced transmission, signals are carried on a line, such as twisted pair, consisting
of two conductors. Signals are transmitted as a current that travels down one conductor
and returns on the other, the two conductors forming a complete circuit. For
digital signals, this technique is known as differential ~i g n a l i n ga,s~ t he binary value
depends on the direction of the voltage difference between the two conductors.
Unbalanced transmission, which is used on older interfaces such as EIA-232, uses a
single conductor to carry the signal, with ground providing the return path.
The balance mode tolerates more, and produces less, noise than unbalanced
mode. Ideally, interference on a balanced line will act equally on both conductors
and not affect the voltage difference. Because unbalanced transmission does not
possess these advantages, it is generally limited to use on coaxial cable; when it is
used on interchange circuits, such as ETA-232, it is limited to very short distances.
The data encoding format used on the ISDN interface depends on the data
rate. For the basic rate of 192 kbps, the standard specifies the use of pseudoternary
coding (Figure 4.2). Binary one is represented by the absence of voltage, and binary
zero is represented by a positive or negative pulse of 750 mV ?10%. For the primary
rate, there are two options: 1.544 Mbps using alternate mark inversion (AMI)
with B8ZS (Figure 4.6) and 2.049 Mbps using AM1 with HDB3. The reason for the
different schemes for the two different primary rates is simply historical; neither has
a particular advantage.

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